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Mayuresh Chitale authored
As per the Priv spec: "The R, W, and X fields form a collective WARL field for which the combinations with R=0 and W=1 are reserved." However currently such writes are not ignored as ought to be. The combinations with RW=01 are allowed only when the Smepmp extension is enabled and mseccfg.MML is set. Signed-off-by:
Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by:
Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20231019065705.1431868-1-mchitale@ventanamicro.com>
Signed-off-by:
Alistair Francis <alistair.francis@wdc.com>Mayuresh Chitale authoredAs per the Priv spec: "The R, W, and X fields form a collective WARL field for which the combinations with R=0 and W=1 are reserved." However currently such writes are not ignored as ought to be. The combinations with RW=01 are allowed only when the Smepmp extension is enabled and mseccfg.MML is set. Signed-off-by:
Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by:
Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20231019065705.1431868-1-mchitale@ventanamicro.com>
Signed-off-by:
Alistair Francis <alistair.francis@wdc.com>
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