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    ce4f70e8
    hw/arm/nrf51_soc: Set system_clock_scale · ce4f70e8
    Peter Maydell authored
    
    
    The nrf51 SoC model wasn't setting the system_clock_scale
    global.which meant that if guest code used the systick timer in "use
    the processor clock" mode it would hang because time never advances.
    
    Set the global to match the documented CPU clock speed for this SoC.
    
    This SoC in fact doesn't have a SysTick timer (which is the only thing
    currently that cares about the system_clock_scale), because it's
    a configurable option in the Cortex-M0. However our Cortex-M0 and
    thus our nrf51 and our micro:bit board do provide a SysTick, so
    we ought to provide a functional one rather than a broken one.
    
    Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
    Reviewed-by: default avatarPhilippe Mathieu-Daudé <f4bug@amsat.org>
    Message-id: 20200727193458.31250-1-peter.maydell@linaro.org
    ce4f70e8
    hw/arm/nrf51_soc: Set system_clock_scale
    Peter Maydell authored
    
    
    The nrf51 SoC model wasn't setting the system_clock_scale
    global.which meant that if guest code used the systick timer in "use
    the processor clock" mode it would hang because time never advances.
    
    Set the global to match the documented CPU clock speed for this SoC.
    
    This SoC in fact doesn't have a SysTick timer (which is the only thing
    currently that cares about the system_clock_scale), because it's
    a configurable option in the Cortex-M0. However our Cortex-M0 and
    thus our nrf51 and our micro:bit board do provide a SysTick, so
    we ought to provide a functional one rather than a broken one.
    
    Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
    Reviewed-by: default avatarPhilippe Mathieu-Daudé <f4bug@amsat.org>
    Message-id: 20200727193458.31250-1-peter.maydell@linaro.org
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