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    71bb4ce1
    hw/char/sh_serial: Add timeout handling to unbreak serial input · 71bb4ce1
    Geert Uytterhoeven authored
    
    
    As of commit 18e8cf159177100e ("serial: sh-sci: increase RX FIFO trigger
    defaults for (H)SCIF") in Linux v4.11-rc1, the serial console on the
    QEMU SH4 target is broken: it delays serial input until enough data has
    been received.
    
    Since aforementioned commit, the Linux SCIF driver programs the Receive
    FIFO Data Count Trigger bits in the FIFO Control Register, to postpone
    generating a receive interrupt until:
      1. At least the receive trigger count of bytes of data are available
         in the receive FIFO, OR
      2. No further data has been received for at least 15 etu after the
         last received data.
    
    While QEMU implements the former, it does not implement the latter.
    Hence the receive interrupt is not generated until the former condition
    is met.
    
    Fix this by adding basic timeout handling.  As the QEMU SCIF emulation
    ignores any serial speed programming, the timeout value used conforms to
    a default speed of 9600 bps, which is fine for any interactive console.
    
    Reported-by: default avatarRob Landley <rob@landley.net>
    Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
    Tested-by: default avatarUlrich Hecht <uli@fpond.eu>
    Tested-by: default avatarRob Landley <rob@landley.net>
    Tested-by: default avatarRich Felker <dalias@libc.org>
    Message-Id: <20180905131125.12635-1-geert+renesas@glider.be>
    Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
    71bb4ce1
    hw/char/sh_serial: Add timeout handling to unbreak serial input
    Geert Uytterhoeven authored
    
    
    As of commit 18e8cf159177100e ("serial: sh-sci: increase RX FIFO trigger
    defaults for (H)SCIF") in Linux v4.11-rc1, the serial console on the
    QEMU SH4 target is broken: it delays serial input until enough data has
    been received.
    
    Since aforementioned commit, the Linux SCIF driver programs the Receive
    FIFO Data Count Trigger bits in the FIFO Control Register, to postpone
    generating a receive interrupt until:
      1. At least the receive trigger count of bytes of data are available
         in the receive FIFO, OR
      2. No further data has been received for at least 15 etu after the
         last received data.
    
    While QEMU implements the former, it does not implement the latter.
    Hence the receive interrupt is not generated until the former condition
    is met.
    
    Fix this by adding basic timeout handling.  As the QEMU SCIF emulation
    ignores any serial speed programming, the timeout value used conforms to
    a default speed of 9600 bps, which is fine for any interactive console.
    
    Reported-by: default avatarRob Landley <rob@landley.net>
    Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
    Tested-by: default avatarUlrich Hecht <uli@fpond.eu>
    Tested-by: default avatarRob Landley <rob@landley.net>
    Tested-by: default avatarRich Felker <dalias@libc.org>
    Message-Id: <20180905131125.12635-1-geert+renesas@glider.be>
    Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
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