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Andre Przywara authored
lzcnt is a AMD Phenom/Barcelona added instruction returning the number of leading zero bits in a word. As this is similar to the "bsr" instruction, reuse the existing code. There need to be some more changes, though, as lzcnt always returns a valid value (in opposite to bsr, which has a special case when the operand is 0). lzcnt is guarded by the ABM CPUID bit (Fn8000_0001:ECX_5). Signed-off-by:
Andre Przywara <andre.przywara@amd.com>
Signed-off-by:
Aurelien Jarno <aurelien@aurel32.net>Andre Przywara authoredlzcnt is a AMD Phenom/Barcelona added instruction returning the number of leading zero bits in a word. As this is similar to the "bsr" instruction, reuse the existing code. There need to be some more changes, though, as lzcnt always returns a valid value (in opposite to bsr, which has a special case when the operand is 0). lzcnt is guarded by the ABM CPUID bit (Fn8000_0001:ECX_5). Signed-off-by:
Andre Przywara <andre.przywara@amd.com>
Signed-off-by:
Aurelien Jarno <aurelien@aurel32.net>
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