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    4c5920af
    target/ppc: tcg: Implement addex instruction · 4c5920af
    Suraj Jitindar Singh authored
    
    
    Implement the addex instruction introduced in ISA V3.00 in qemu tcg.
    
    The add extended using alternate carry bit (addex) instruction performs
    the same operation as the add extended (adde) instruction, but using the
    overflow (ov) field in the fixed point exception register (xer) as the
    carry in and out instead of the carry (ca) field.
    
    The instruction has a Z23-form, not an XO form, as follows:
    
        ------------------------------------------------------------------
        |   31   |   RT   |   RA   |   RB   |   CY   |     170     |  0  |
        ------------------------------------------------------------------
        0        6        11       16       21       23            31    32
    
    However since the only valid form of the instruction defined so far is
    CY = 0, we can treat this like an XO form instruction.
    
    There is no dot form (addex.) of the instruction and the summary overflow
    (so) bit in the xer is not modified by this instruction.
    
    For simplicity we reuse the gen_op_arith_add function and add a function
    argument to specify where the carry in input should come from and the
    carry out output be stored (note must be the same location).
    
    Signed-off-by: default avatarSuraj Jitindar Singh <sjitindarsingh@gmail.com>
    Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
    4c5920af
    target/ppc: tcg: Implement addex instruction
    Suraj Jitindar Singh authored
    
    
    Implement the addex instruction introduced in ISA V3.00 in qemu tcg.
    
    The add extended using alternate carry bit (addex) instruction performs
    the same operation as the add extended (adde) instruction, but using the
    overflow (ov) field in the fixed point exception register (xer) as the
    carry in and out instead of the carry (ca) field.
    
    The instruction has a Z23-form, not an XO form, as follows:
    
        ------------------------------------------------------------------
        |   31   |   RT   |   RA   |   RB   |   CY   |     170     |  0  |
        ------------------------------------------------------------------
        0        6        11       16       21       23            31    32
    
    However since the only valid form of the instruction defined so far is
    CY = 0, we can treat this like an XO form instruction.
    
    There is no dot form (addex.) of the instruction and the summary overflow
    (so) bit in the xer is not modified by this instruction.
    
    For simplicity we reuse the gen_op_arith_add function and add a function
    argument to specify where the carry in input should come from and the
    carry out output be stored (note must be the same location).
    
    Signed-off-by: default avatarSuraj Jitindar Singh <sjitindarsingh@gmail.com>
    Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
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