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    4960f084
    aspeed/i2c: introduce a state machine · 4960f084
    Cédric Le Goater authored
    
    
    The Aspeed I2C controller maintains a state machine in the command
    register, which is mostly used for debug.
    
    Let's start adding a few states to handle abnormal STOP
    commands. Today, the model uses the busy status of the bus as a
    condition to do so but it is not precise enough.
    
    Also remove the ABNORMAL bit for failing TX commands. This is
    incorrect with respect to the specs.
    
    Signed-off-by: default avatarCédric Le Goater <clg@kaod.org>
    Message-id: 1494827476-1487-4-git-send-email-clg@kaod.org
    Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
    4960f084
    aspeed/i2c: introduce a state machine
    Cédric Le Goater authored
    
    
    The Aspeed I2C controller maintains a state machine in the command
    register, which is mostly used for debug.
    
    Let's start adding a few states to handle abnormal STOP
    commands. Today, the model uses the busy status of the bus as a
    condition to do so but it is not precise enough.
    
    Also remove the ABNORMAL bit for failing TX commands. This is
    incorrect with respect to the specs.
    
    Signed-off-by: default avatarCédric Le Goater <clg@kaod.org>
    Message-id: 1494827476-1487-4-git-send-email-clg@kaod.org
    Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
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