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Xiaojuan Yang authored
By the manual of LoongArch CSR, the VS field(18:16 bits) of ECFG reg means that the number of instructions between each exception entry is 2^VS. Signed-off-by:
Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by:
Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220701093407.2150607-9-yangxiaojuan@loongson.cn>
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>Xiaojuan Yang authoredBy the manual of LoongArch CSR, the VS field(18:16 bits) of ECFG reg means that the number of instructions between each exception entry is 2^VS. Signed-off-by:
Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by:
Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220701093407.2150607-9-yangxiaojuan@loongson.cn>
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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