-
Alex Bennée authored
While the vargs approach was flexible the original MTTCG ended up having munge the bits to a bitmap so the data could be used in deferred work helpers. Instead of hiding that in cputlb we push the change to the API to make it take a bitmap of MMU indexes instead. For ARM some the resulting flushes end up being quite long so to aid readability I've tended to move the index shifting to a new line so all the bits being or-ed together line up nicely, for example: tlb_flush_page_by_mmuidx(other_cs, pageaddr, (1 << ARMMMUIdx_S1SE1) | (1 << ARMMMUIdx_S1SE0)); Signed-off-by:
Alex Bennée <alex.bennee@linaro.org>
[AT: SPARC parts only]
Reviewed-by:
Artyom Tarasenko <atar4qemu@gmail.com>
Reviewed-by:
Richard Henderson <rth@twiddle.net>
[PM: ARM parts only]
Reviewed-by:
Peter Maydell <peter.maydell@linaro.org>Alex Bennée authoredWhile the vargs approach was flexible the original MTTCG ended up having munge the bits to a bitmap so the data could be used in deferred work helpers. Instead of hiding that in cputlb we push the change to the API to make it take a bitmap of MMU indexes instead. For ARM some the resulting flushes end up being quite long so to aid readability I've tended to move the index shifting to a new line so all the bits being or-ed together line up nicely, for example: tlb_flush_page_by_mmuidx(other_cs, pageaddr, (1 << ARMMMUIdx_S1SE1) | (1 << ARMMMUIdx_S1SE0)); Signed-off-by:
Alex Bennée <alex.bennee@linaro.org>
[AT: SPARC parts only]
Reviewed-by:
Artyom Tarasenko <atar4qemu@gmail.com>
Reviewed-by:
Richard Henderson <rth@twiddle.net>
[PM: ARM parts only]
Reviewed-by:
Peter Maydell <peter.maydell@linaro.org>
Loading